The control unit, the arithmetic unit, the register unit, the address-generating unit and the bus interface are essential components of a digital signal processor. The control unit establishes the sequence in which instructions are read out of the program memory, monitors the connections to peripheral devices and controls the register unit, the arithmetic unit and the address-generating unit. In the address-generating unit, the required addresses, with the aid of which the data memory is read or described, are computed in a special address arithmetic unit. In this unit, valid addresses in the contents of registers are determined by means of arithmetic and logic operations. Depending on the specific structure of the processor and of the memory responding to it, highly variable computation methods are required in the address arithmetic unit. In multitasking processors, the address-generating unit also manages protected data areas and checks access authorization.
In order to be able to provide a high degree of flexibility with regard to memory access, a multitude of addressing modes is frequently implemented by providing a plurality of address arithmetic units for obtaining minimum access time. This entails a high circuit cost, expenditure, and in addition, requires run times that under some circumstances stand in the way of rapid program extension.
On the other hand, a multitude of addressing modes with only one address arithmetic unit in the address-generating unit often can be realized only by complicated and hence time-consuming computations, which under some circumstances must be performed outside the address-generating unit.